[PON]
As an optical access system, a PON has been known, in which an OLT (Optical Line Terminal) located on a station side and an ONU (Optical Network Unit) located on a subscriber side are connected in a one-to-n manner (n is an integer equal to or larger than 2) by the equipment passively performing multiplexing and demultiplexing of optical signals such as an optical splitter. FIG. 1 shows a network configuration in the PON.
[Burst Signal]
Upstream optical signals from a plurality of ONUs to the OLT are multiplexed by the optical splitter. Also, distances between the OLT and each of the ONUs, that is, optical fiber lengths are not always equal to each other. Hence, the optical signals received at the OLT become burst signals whose intensity varies greatly.
[Configuration of Burst Signal]
FIG. 2 shows the burst signal which the OLT receives. The burst signal can be divided into a signal enable region and a signal disable region, and the signal enable region further includes a Laser ON region, a Sync Pattern region, a Burst Delimiter region, a Data region, a Burst Terminator region and a Laser OFF region (see, for example, IEEE802.3av (Non-Patent Document 1)).
[Burst Signal Receiving Operation]
A receiver in the OLT performs the operations of an automatic gain control, an automatic threshold control and a clock reproduction upon receipt of the Laser ON and the Sync Pattern. Also, a start point of the data is detected by the bit pattern detection of the Burst Delimiter, and an end point of the data is detected by the Burst Terminator.
[Description of Waveform Distortion]
The receiver in the OLT receives a correct pattern during the period until the receipt of the Burst Terminator after the completion of the automatic gain control, the automatic threshold control and the clock reproduction. The bit patterns received in the period other than that, that is, in the middle of the signal disable region, the Laser ON region, the laser OFF region and the Sync Pattern region are different from the bit patterns sent by the transmission side, and are likely to become indefinite patterns.
Thus, it is necessary to prevent a malfunction in a logic circuit of the subsequent stage when these indefinite patterns are received. Particularly, it is necessary to prevent the detection of the Burst Delimiter at a wrong position.
[Conventional Example for Preventing Malfunction]
As means for preventing these malfunctions, for example, Patent Documents 1 and 2 are known.
In Japanese Patent Application Laid-Open Publication No. 2001-352353 (Patent Document 1), a gate circuit is provided on the subsequent stage of a limiter amplifier. When the peak value of a preamplifier circuit is smaller than a set value, it is determined as a signal disable region, and the output of the gate circuit is shut off. FIG. 4 shows a receiving circuit including this system. In this system, an indefinite signal output is not issued to the logic circuit on the subsequent stage during a signal disable period. Hence, it is possible to prevent a malfunction of the logic circuit on the subsequent stage during the signal disable period.
In Japanese Patent Application Laid-Open Publication No. 2006-254061 (Patent Document 2), a signal enable determination circuit and a timer circuit are provided by extending the scope of the Patent Document 1, and the output of the gate circuit is released after waiting for only a mask time from the signal enable determination. In the signal disable region and the region having a duty distortion, the output is shut off, and thus, a signal output having little distortion from its top can be realized.